
Theory of Operation 8
16800 Series Portable Logic Analyzers Service Guide 169
Module Interface Board (MIB)
The MIB subsystem block diagram shown here includes:
• Module bus FPGA(s) (more on page 172).
• I/O FPGA (more on page 172). Supported rear panel
signals include:
• Trigger IN/OUT (more on page 173).
• Clock IN (more on page 173).
• PLD (more on page 173).
• Voltage rail monitor (more on page 173).
• Overtemp monitor (more on page 173).
• Fan control (more on page 174).
I/O FPGA
Module FPGA(s)Module
Connector(s)
(1 or 2)
Fan Control
PLD
Rear Panel
Signals
PCI Board
Connector
Fan
Connectors
Power
Connectors (3)
CPU Power
Connector
CPU Power Switch
Connector
Power Switch
Connector
Power Sense
Connector
Overtemp
Monitor
Voltage Rail
Monitor
To Power Planes
To Power Planes
PCI Bus
Front Panel
Switches
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