Agilent Technologies DisplayPort Instrukcja Obsługi Pobierz pdf (Strona 151)

Link Layer Protocol Tests 17

Agilent U7232A DisplayPort Electrical Performance Compliance Test Application 151

Pre-Emphasis Test Condition

Bit Rate: highest bit rates are supported.

Output Level: 400 mVolts.

Pre- Emphasis: All.

Test Pattern: PRBS 7.

Level Test Condition

Bit Rate: highest bit rates are supported.

Output Level: All.

Pre- Emphasis: 0 dB.

Test Pattern: PRBS 7.

Bit Rate Test Condition

Bit Rate: all bit rates are supported.

Output Level: 400 mVolts.

Pre- Emphasis: 0 dB.

Test Pattern: PRBS 7.

Test Plan Check Mode Turn on test plan check mode to simulate the actual test plan run flow

without actual tests being run.

SSC Acquisitions Number of SSC cycle captured for SSC related tests. Maximum

number is 25.

Low Bit Rate SSC

Smoothing Points

Sets the number of smoothing points for SSC low pass filter when bit

rate is 1.62 Gbps.

High Bit Rate SSC

Smoothing Points

Sets the number of smoothing points for SSC low pass filter when bit

rate is 2.70 Gbps.

Memory Depth Sets the memory depth for acquisition

PRBS Validation Algorithm Settings

PRBS pattern checker

rule

Determine the rules applied to PRBS 7 Pattern detector. By selecting

Strict, test can only proceed with the correct PRBS 7 pattern only.

Table 19 Test Configuration Options

Configuration Option Description

1 2 ... 146 147 148 149 150 151 152 153 154 155 156 ... 245 246

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Agilent Technologies DisplayPort Instrukcja Obsługi Strona 151