Agilent Technologies 54502A Instrukcja Obsługi Strona 54

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2. Adjust pulse generator for the output in figure 3-22.
Setting for HP 8161A:
Parameter Output A Output B
Input Mode Norm ---
Period (PER) 120 ns ---
Width (WID) 60 ns 10 ns
Leading Edge (LEE) 1 ns 1 ns
Trailing Edge (TRE) 1 ns 1 ns
High Level HIL) 3.2 V 3.2 V
Low Level (LOL) 0 V 0 V
Delay (DEL) 40 ns ---
Double Pulse (DBL) --- 60 ns
Output Mode ENABLE ENABLE
3. Assign the pod under test to Analyzer 1 in the System Configuration as in
previous figure 3-4.
4. Set up the State Format Specification as in figure 3-23, assigning the falling J
clock to Master Clock and the rising J clock to Slave Clock. Refer to steps a
through d after figure if unfamiliar with the menu.
Figure 3-22. Waveform for Data Test 5
Figure 3-23. State Format Specification for Data Test 5
HP 1650B/1651B Performance Tests
Service Manual 3-19
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