Agilent Technologies J-BERT N4903B Instrukcja Użytkownika Strona 68
- Strona / 68
- Spis treści
- BOOKMARKI
- PCI Express, SATA and 1
- Enabling the Compliance 1
- MIPI M-PHY 6Gbps 2
- Compliance Testing 4
- Legal: Tim Haslach 6
- Low jitter 8
- Signal Path Flow 9
- S-Parameters 10
- -- Transmitter FIR 11
- Coefficient Space and Presets 12
- Motherboard Testing 13
- Add-in Card Testing 13
- Add-in Card (AIC) TX Test 14
- AIC RX Test Calibration 15
- AIC RX Test 16
- PCIe 3.0 CBB Fixture 17
- N5393C TX Test Application 18
- SATA Rev. 3.0 & SAS -3 19
- Long+ breakout 21
- Stress calibration 22
- Jitter tolerance compliance 24
- Frequency / GHz 25
- Automated jitter 27
- Conclusions 28
- N8801A Protocol 30
- Characterization 30
- SATA / SAS Test Challenges 32
- Agilent Restricted 32
- T10 Committee SAS Roadmap 33
- 12Gbps signal with 35
- This could represent the 1 36
- Before CIC 36
- After CIC 36
- Transmitter 36
- Embed the Gen3i CIC 37
- SATA-IO Gold Suite Test Tool 39
- Mode Amplitude 40
- SATA-IO RSG Compliance Test 44
- 45A. Schmitt 45
- Dec. 08, 2009 45
- ValiFrame N5990A 46
- TSG-03 : Differential Skew 47
- Time Domain 49
- Frequency Domain 49
- PIL opened in Q1’09 52
- Layer Focus 53
- Receiver 54
- Transmitter test requirements 55
- Compliance Channels 56
- External Error Counter 60
- Host compliance channel setup 62
- USB 3.0 Technical 64
- Time Domain Measurements 65
- Frequency Domain Measurements 65
- E5071C ENA Series + opt. TDR 65
- All necessary parameters 67
- Measured simultaneously 67
- Displayed in one screen 67
- Flexible measurement setup 67
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