Agilent Technologies ESG Podręcznik Użytkownika

User’s GuideAgilent TechnologiesESG Vector Signal GeneratorThis guide applies to the signal generator models listed below. Due to our continuing effor

ContentsxModifying a Multicarrier cdma2000 4-Carrier Template . . . . . . . . . . . . . . . . . . . . . 221Activating a Custom Multicarrier cdma2000

84 Chapter 3Basic Digital OperationLocal Settings for ARB Waveform Formats and the Dual ARB PlayerLocal Settings for ARB Waveform Formats and the Dual

Chapter 3 85Basic Digital OperationLocal Settings for ARB Waveform Formats and the Dual ARB Playerplayer is active, the three softkeys in the I/Q and

86 Chapter 3Basic Digital OperationLocal Settings for ARB Waveform Formats and the Dual ARB PlayerSCPI Command ChangesNew SCPI commands have been deve

Chapter 3 87Basic Digital OperationLocal Settings for ARB Waveform Formats and the Dual ARB PlayerWaveform MarkersThe waveform markers, previously ava

88 Chapter 3Basic Digital OperationLocal Settings for ARB Waveform Formats and the Dual ARB PlayerFigure 3-13 ARB Marker Location and Softkey MenusBlu

Chapter 3 89Basic Digital OperationLocal Settings for ARB Waveform Formats and the Dual ARB Playeraffect the ALC hold and the alternate amplitude mark

90 Chapter 3Basic Digital OperationUsing Waveform MarkersUsing Waveform MarkersThe ESG provides you with four waveform markers. Waveform markers are u

Chapter 3 91Basic Digital OperationUsing Waveform MarkersWaveform.This step is only for the dual ARB player. It is being done so the dual ARB player c

92 Chapter 3Basic Digital OperationUsing Waveform MarkersPress the Set Marker Off All Points softkey.You have now removed the marker point(s) that res

Chapter 3 93Basic Digital OperationUsing Waveform MarkersA range of waveform marker points have been set. The marker signal will start on waveform sam

ContentsxiOption Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .256GPS Concept

94 Chapter 3Basic Digital OperationUsing Waveform MarkersSetting the Marker Polarity1. Press the Marker Polarity softkey.Notice that you can individua

Chapter 3 95Basic Digital OperationUsing Waveform Markers7. Press the Return hardkey to return to the marker utility menu.8. If you have not already s

96 Chapter 3Basic Digital OperationUsing Waveform Markers10.Press Name and Store.If you exit the softkey menu shown above without saving the changes,

Chapter 3 97Basic Digital OperationUsing Waveform Markers2. Press Insert Waveform.3. Highlight the desired waveform segment.4. Press Insert Selected W

98 Chapter 3Basic Digital OperationUsing Waveform Markers13.Press the Enter softkey.14.Press the Mode Setup softkey to return to the first-level softk

Chapter 3 99Basic Digital OperationUsing Waveform TriggersUsing Waveform TriggersThe ARB modulation formats and the dual ARB player includes several d

100 Chapter 3Basic Digital OperationUsing Waveform Triggers2. Press Amplitude > -10 > dBm.3. Press the RF On/Off hardkey to On.Monitoring the Cu

Chapter 3 101Basic Digital OperationUsing External TriggeringUsing External TriggeringUsing this procedure, you learn how to utilize an external funct

102 Chapter 3Basic Digital OperationUsing External Triggering4. Press Ext Delay Off On to On.5. Press Ext Delay Time > 100 > msec.The waveform w

Chapter 3 103Basic Digital OperationUnderstanding Waveform ClippingUnderstanding Waveform ClippingThe clipping feature is available only with the dual

ContentsxiiGenerating the Baseband Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 278Configuring the RF Outpu

104 Chapter 3Basic Digital OperationUnderstanding Waveform ClippingFigure 3-15 Multiple Channel SummingThe I and Q waveforms combine in the I/Q modula

Chapter 3 105Basic Digital OperationUnderstanding Waveform ClippingFigure 3-16 Combining the I and Q Waveforms

106 Chapter 3Basic Digital OperationUnderstanding Waveform ClippingHow Peaks Cause Spectral RegrowthBecause of the relative infrequency of high power

Chapter 3 107Basic Digital OperationUnderstanding Waveform ClippingHow Clipping Reduces Peak-to-Average PowerYou can reduce peak-to-average power, and

108 Chapter 3Basic Digital OperationUnderstanding Waveform ClippingFigure 3-20 Rectangular Clipping

Chapter 3 109Basic Digital OperationUnderstanding Waveform ClippingFigure 3-21 Reduction of Peak-to-Average PowerFIR Filtering OptionsWith CDMA person

110 Chapter 3Basic Digital OperationUnderstanding Waveform ClippingHow Clipping Differs from Symbol Offset in W-CDMAAnother method used to control the

Chapter 3 111Basic Digital OperationUsing Waveform ClippingUsing Waveform Clipping The clipping feature is available only with the Dual Arb, Arb IS-95

112 Chapter 3Basic Digital OperationUsing Waveform Clippingnow being transmitted. If the changes were made to an inactive waveform segment, the change

Chapter 3 113Basic Digital OperationUsing Customized Burst Shape CurvesUsing Customized Burst Shape CurvesYou can adjust the shape of the rise time cu

Contentsxiii13. W-CDMA Digital Modulation for Component Test . . . . . . . . . . . . . . . . . . 293W-CDMA Downlink Modulation . . . . . . . . . . . .

114 Chapter 3Basic Digital OperationUsing Customized Burst Shape Curvesvary between 0 (no power) and 1 (full power) and are scaled linearly. Once spec

Chapter 3 115Basic Digital OperationUsing Customized Burst Shape CurvesBurst shape maximum rise and fall time values are affected by the following fac

116 Chapter 3Basic Digital OperationUsing Customized Burst Shape CurvesCreating a User-Defined Burst Shape CurveUsing this procedure, you learn how to

Chapter 3 117Basic Digital OperationUsing Customized Burst Shape Curves2. Press .4 > Enter.3. Press .6 > Enter.4. Enter the remaining values for

118 Chapter 3Basic Digital OperationUsing Customized Burst Shape CurvesFigure 3-23To return the burst to the default conditions, press the following k

Chapter 3 119Basic Digital OperationUsing Customized Burst Shape CurvesShape Curve” on page 118.1. Press Preset.2. Perform the following keypress seq

120 Chapter 3Basic Digital OperationUsing Finite Impulse Response (FIR) FiltersUsing Finite Impulse Response (FIR) FiltersFinite Impulse Response filt

Chapter 3 121Basic Digital OperationUsing Finite Impulse Response (FIR) Filters2. Use the numeric keypad to type the first value (−0.000076) from Tabl

122 Chapter 3Basic Digital OperationUsing Finite Impulse Response (FIR) FiltersFigure 3-25Setting the Oversample RatioThe oversample ratio (OSR) is th

Chapter 3 123Basic Digital OperationUsing Finite Impulse Response (FIR) FiltersFigure 3-262. Press Return.3. Press Display Impulse Response. Refer to

ContentsxivDownlink PICH Frame Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343Downlink PCCPCH + SCH Fram

124 Chapter 3Basic Digital OperationUsing Finite Impulse Response (FIR) FiltersStoring the Filter to Memory Use the following steps to store the file.

Chapter 3 125Basic Digital OperationModifying a FIR Filter Using the FIR Table EditorModifying a FIR Filter Using the FIR Table EditorFIR filters stor

126 Chapter 3Basic Digital OperationModifying a FIR Filter Using the FIR Table EditorFigure 3-298. Press Return.Modifying the Coefficients1. Highlight

Chapter 3 127Basic Digital OperationModifying a FIR Filter Using the FIR Table EditorRefer to Figure 3-30 on page 126. The graphic display can provide

128 Chapter 3Basic Digital OperationDifferential EncodingDifferential EncodingDifferential encoding is a digital-encoding technique whereby a binary v

Chapter 3 129Basic Digital OperationDifferential EncodingThe following illustration shows a 4QAM modulation I/Q State Map.Differential Data EncodingIn

130 Chapter 3Basic Digital OperationDifferential EncodingFor a bit-by-bit illustration of the encoding process, see the following illustration. How Di

Chapter 3 131Basic Digital OperationDifferential EncodingThese symbol table offsets will result in one of the transitions, as shown.When applied to th

132 Chapter 3Basic Digital OperationDifferential Encodingappear in the following illustration. As you can see from the previous illustration, the 1st

Chapter 3 133Basic Digital OperationDifferential EncodingConfiguring User-Defined I/Q Modulation1. Press Preset.2. Perform the following keypress sequ

ContentsxvConnecting the ESG to a Base Station . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .397Overload Testing with Multipl

134 Chapter 3Basic Digital OperationDifferential Encodingmodulation. Refer to Figure 3-32 on page 134.Figure 3-32Editing the Differential State Map1.

Chapter 3 135Basic Digital OperationDifferential EncodingNOTE At this point, the modulation has two bits per symbol. For the data values 00000000, 000

136 Chapter 3Basic Digital OperationUser-Defined I/Q MapsUser-Defined I/Q MapsIn modulation schemes defined by standards (such as TDMA and CDMA), symb

Chapter 3 137Basic Digital OperationUser-Defined I/Q MapsEntering I and Q ValuesEnter the I and Q values listed in the following table.1. Press .5 >

138 Chapter 3Basic Digital OperationUser-Defined I/Q Mapsuser-defined I/Q map, complete the steps in the previous sections, “Accessing and Clearing th

Chapter 3 139Basic Digital OperationUser-Defined I/Q MapsDisplaying the I/Q MapPress More (2 of 2) > Display I/Q Map. Note that one symbol has move

140 Chapter 3Basic Digital OperationUser-Defined FSK ModulationUser-Defined FSK ModulationUsing the Frequency Values table editor, you can define, mod

Chapter 3 141Basic Digital OperationUser-Defined FSK ModulationAs you modify the frequency deviation values, the cursor moves to the next data row. An

142 Chapter 3Basic Digital OperationUser-Defined FSK Modulation5. Press −600 > Hz.6. Press −1.8 > kHz.This sets the frequency deviation for data

Chapter 3 143Basic Digital OperationCreating and Using Bit FilesCreating and Using Bit FilesThis procedure teaches you how to use the Bit File Editor

Contentsxvi16. Troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461If You Encounter a P

144 Chapter 3Basic Digital OperationCreating and Using Bit Files NOTE When you create new file, the default name appears as UNTITLED, or UNTITLED1, an

Chapter 3 145Basic Digital OperationCreating and Using Bit FilesEntering Bit Values1. Refer to the following figure.2. Enter the 32 bit values shown.B

146 Chapter 3Basic Digital OperationCreating and Using Bit FilesRecalling a User FileIn this example, you learn how to recall a user-defined data file

Chapter 3 147Basic Digital OperationCreating and Using Bit FilesInverting Bit Values1. Press 1011.This inverts the bit values that are positioned 4C t

148 Chapter 3Basic Digital OperationCreating and Using Bit FilesApplying Bit Errors to a User File In this example, you learn how to apply bit errors

1494 Analog Modulation

150 Chapter 4Analog ModulationAnalog Modulation WaveformsAnalog Modulation WaveformsThe signal generator can modulate the RF carrier with four types o

Chapter 4 151Analog ModulationConfiguring AMConfiguring AMUsing this procedures, you will learn how to generate an amplitude-modulated RF carrier. Set

152 Chapter 4Analog ModulationConfiguring FMConfiguring FMUsing this procedures, you will learn how to create a frequency-modulated RF carrier.Setting

Chapter 4 153Analog ModulationConfiguring ΦMConfiguring ΦMUsing this procedures, you will learn how to create a phase-modulated RF carrier.Setting the

11 Signal Generator OverviewThis chapter provides a general overview of Agilent PSG signal generators and includes the following major sections:• “Sig

154 Chapter 4Analog ModulationConfiguring Pulse ModulationConfiguring Pulse ModulationUsing the following procedures, you will learn how to create a p

Chapter 4 155Analog ModulationConfiguring the LF OutputConfiguring the LF Output The signal generator has a low frequency (LF) output. The LF output’s

156 Chapter 4Analog ModulationConfiguring the LF OutputConfiguring the LF Output with an Internal Modulation SourceIn this example, the internal FM mo

Chapter 4 157Analog ModulationConfiguring the LF OutputConfiguring the LF Output with a Function Generator SourceIn this example, the function generat

158 Chapter 4Analog ModulationConfiguring the LF Output

1595 AWGN Waveform Generator

160 Chapter 5AWGN Waveform GeneratorConfiguring the AWGN GeneratorConfiguring the AWGN Generator1. Press Preset.2. Press Mode > More (1 of 2) >

1616 BERT Testing

162 Chapter 6BERT TestingSetting Up a PHS Bit Error Rate TestSetting Up a PHS Bit Error Rate Test This section shows how to make BER measurements on a

Chapter 6 163BERT TestingSetting Up a PHS Bit Error Rate TestConnecting the Test EquipmentRefer to Figure 6-1. 1. Connect the cables between your radi

2 Chapter 1Signal Generator OverviewSignal Generator FeaturesSignal Generator FeaturesThis section provides a list of standard signal generator featur

164 Chapter 6BERT TestingSetting Up a PHS Bit Error Rate TestThe amplitude can also be set using an Amplitude softkey, located in the Baseband BERT so

Chapter 6 165BERT TestingSetting Up a PHS Bit Error Rate TestSelecting the BERT Data Pattern and Total Bits1. Press Aux Fctn > BERT > Baseband B

166 Chapter 6BERT TestingMeasuring RF Loopback BER with Option 300Measuring RF Loopback BER with Option 300The following procedure uses the data loope

Chapter 6 167BERT TestingMeasuring RF Loopback BER with Option 300Connecting the Test EquipmentRefer to Figure 6-2 for connections to the ESG, VSA, an

168 Chapter 6BERT TestingMeasuring RF Loopback BER with Option 300Configuring GSM Mode on the Agilent Technologies E4406A VSA Series Transmitter Teste

Chapter 6 169BERT TestingMeasuring RF Loopback BER with Option 300Configuring GSM Mode on the ESG Vector Signal GeneratorThe following steps will show

170 Chapter 6BERT TestingMeasuring RF Loopback BER with Option 300NOTE If the default training sequence (TSCO) does not match the training sequence se

Chapter 6 171BERT TestingMeasuring RF Loopback BER with Option 30010.Press Amplitude > −95 > dBm.The amplitude can also be set using an Amplitud

172 Chapter 6BERT TestingMeasuring RF Loopback BER with Option 300Figure 6-6Once synchronization is achieved, the ESG will expect to receive a TCH to

Chapter 6 173BERT TestingMeasuring RF Loopback BER with Option 3007. On the ESG, press Configure Measurement > Timeslot # > 2 > Enter. This s

Chapter 1 3Signal Generator OverviewSignal Generator Features— adjustable pulse width— adjustable pulse period— adjustable pulse delay• external modul

174 Chapter 6BERT TestingMeasuring RF Loopback BER with Option 300E4406A VSA Series Transmitter Tester” and “Configuring GSM Mode on the ESG Vector Si

Chapter 6 175BERT TestingMeasuring RF Loopback BER with Option 300Making Loopback BER MeasurementsThe following procedure shows you how to configure t

176 Chapter 6BERT TestingMeasuring RF Loopback BER with Option 300Figure 6-11NOTE To select an alternate trigger mode (for example, Immediate):Press R

Chapter 6 177BERT TestingMeasuring RF Loopback BER with Option 300Figure 6-124. Press Frame Count > 100 > Enter. 5. Press Target % > 2 > %

178 Chapter 6BERT TestingMeasuring RF Loopback BER with Option 300Figure 6-1310. Press Trigger to start the measurement:After the search is complete,

Chapter 6 179BERT TestingMeasuring RF Loopback BER with Option 300Figure 6-1411. Press Stop Sensitivity Search to terminate a measurement:NOTE To sele

180 Chapter 6BERT TestingUsing the External Frame Trigger Function with the EDGE FormatUsing the External Frame Trigger Function with the EDGE FormatN

Chapter 6 181BERT TestingUsing the External Frame Trigger Function with the EDGE FormatFigure 6-168. Calculate the offset value X using the following

182 Chapter 6BERT TestingUsing the External Frame Trigger Function with the EDGE FormatFigure 6-172. Press Aux Fctn > BERT > BTS BERT EDGE Loopb

Chapter 6 183BERT TestingUsing the External Frame Trigger Function with the EDGE Format8. Press Configure Triggers > Ext Frame Trigger Delay.9. Cha

ii NoticeThe material contained in this document is provided “as is”, and is subject to being changed, without notice, in future editions.Further, to

4 Chapter 1Signal Generator OverviewOptionsOptionsTables 1-1 through 1-7 show the available options for your signal generator. They include hardware,

184 Chapter 6BERT TestingBit Error Rate Tester–Option UN7Bit Error Rate Tester–Option UN7The bit error rate test (BERT) capability allows you to perfo

Chapter 6 185BERT TestingBit Error Rate Tester–Option UN7Clock Gate FunctionWhen you use the clock gate function, the clock signal to the BER CLK IN c

186 Chapter 6BERT TestingBit Error Rate Tester–Option UN7Clock/Gate Delay FunctionThis function enables you to restore the timing relationship between

Chapter 6 187BERT TestingBit Error Rate Tester–Option UN7Clock Delay FunctionIn this example, the clock delay function is off. Figure 6-21 shows the i

188 Chapter 6BERT TestingBit Error Rate Tester–Option UN7Gate Delay Function in the Clock ModeTo use this function, the clock must be set to continuou

Chapter 6 189BERT TestingBit Error Rate Tester–Option UN7TriggeringThis section describes the operating principles of the triggering function for Opti

190 Chapter 6BERT TestingBit Error Rate Tester–Option UN7In this example, the triggering sequence is where you have an incoming data clock and data bi

Chapter 6 191BERT TestingBit Error Rate Tester–Option UN7In this example, the triggering sequence is where the trigger delay is active with a cycle co

192 Chapter 6BERT TestingBit Error Rate Tester–Option UN7Data ProcessingData RatesData rates up to 60 MHz are supported for BER analysis on un-framed

Chapter 6 193BERT TestingBit Error Rate Tester–Option UN7Repeat MeasurementsWhen the Cycle Count softkey is set to more than 1, the synchronization pe

Chapter 1 5Signal Generator OverviewOptionsNOTE To ensure an up-to-date list of available software personalities, refer to www.agilent.com/find/signal

194 Chapter 6BERT TestingBit Error Rate Tester–Option UN7Testing Signal DefinitionsThe timing diagram Figure 6-30, “Testing Signal Definitions,” shows

Chapter 6 195BERT TestingRF Loopback BER–Option 300RF Loopback BER–Option 300SynchronizationSynchronizing the test equipment to the base transceiver s

196 Chapter 6BERT TestingRF Loopback BER–Option 300PN synchronization is also a prerequisite to BER measurements. This is automatic but is dependent o

Chapter 6 197BERT TestingRF Loopback BER–Option 300during synchronization to the BTS and during measurements.GSM Transmit DataThe minimum GSM transmit

198 Chapter 6BERT TestingRF Loopback BER–Option 300

1997 Bluetooth Signals

200 Chapter 7Bluetooth SignalsAccessing the Bluetooth Setup Menu on the ESGAccessing the Bluetooth Setup Menu on the ESGOption 406 is required to perf

Chapter 7 201Bluetooth SignalsSetting Up Packet ParametersSetting Up Packet ParametersThe steps in this procedure build upon the previous procedure.Th

202 Chapter 7Bluetooth SignalsSetting Up Packet ParametersNOTE The all-zero AM_ADDR is reserved for broadcast messages.4. Press Payload Data > 8 Bi

Chapter 7 203Bluetooth SignalsSetting up ImpairmentsSetting up ImpairmentsThe steps in this procedure build upon the previous procedure. This procedur

6 Chapter 1Signal Generator OverviewOptionsTable 1-6 DocumentationOption Description0BV Service documentation (component level)0BW Service documentati

204 Chapter 7Bluetooth SignalsSetting up Impairmentsnoise.c. Press AWGN Off On to On.This turns the AWGN, as a Bluetooth impairment, on.8. Press Retur

Chapter 7 205Bluetooth SignalsUsing BurstUsing Burst The steps in this procedure build upon the previous procedure.1. Press Return to return to the to

206 Chapter 7Bluetooth SignalsUsing Clock/Gate DelayUsing Clock/Gate DelayThe steps in this procedure build upon the previous procedure.This function

Chapter 7 207Bluetooth SignalsTurning On a Bluetooth SignalTurning On a Bluetooth SignalThis procedure builds upon the previous procedure.Press Blueto

208 Chapter 7Bluetooth SignalsTurning On a Bluetooth Signal

2098 CDMA Digital Modulation

210 Chapter 8CDMA Digital Modulationcdma2000 Forward Link Modulation for Component Testcdma2000 Forward Link Modulation for Component TestThis section

Chapter 8 211CDMA Digital Modulationcdma2000 Forward Link Modulation for Component TestCreating a User-Defined CDMA Forward Link StateThis procedure t

212 Chapter 8CDMA Digital Modulationcdma2000 Forward Link Modulation for Component Test3. Press Edit Item > 4800. 4. Highlight the Walsh code value

Chapter 8 213CDMA Digital Modulationcdma2000 Forward Link Modulation for Component TestInserting Additional cdma2000 Forward Link Traffic Channels1. P

Chapter 1 7Signal Generator OverviewFront Panel OverviewFront Panel OverviewFigure 1-1 shows the signal generator front panel. This interface enables

214 Chapter 8CDMA Digital Modulationcdma2000 Reverse Link Modulation for Component Testcdma2000 Reverse Link Modulation for Component TestThis section

Chapter 8 215CDMA Digital Modulationcdma2000 Reverse Link Modulation for Component Testsignal generator.Creating a User-Defined cdma2000 Reverse Link

216 Chapter 8CDMA Digital Modulationcdma2000 Reverse Link Modulation for Component Test2. Highlight the Rate bps value (9600).3. Press Edit Item >

Chapter 8 217CDMA Digital Modulationcdma2000 Reverse Link Modulation for Component TestInserting Additional cdma2000 Reverse Link Traffic Channels1. P

218 Chapter 8CDMA Digital ModulationStoring a Component Test Waveform to MemoryStoring a Component Test Waveform to MemoryIn this section, you will le

Chapter 8 219CDMA Digital ModulationRecalling a Component Test WaveformRecalling a Component Test Waveform In this section, you will learn how to reca

220 Chapter 8CDMA Digital ModulationCreating a Custom Multicarrier cdma2000 WaveformCreating a Custom Multicarrier cdma2000 WaveformThe signal generat

Chapter 8 221CDMA Digital ModulationCreating a Custom Multicarrier cdma2000 WaveformFigure 8-7Modifying a Multicarrier cdma2000 4-Carrier TemplateUse

222 Chapter 8CDMA Digital ModulationCreating a Custom Multicarrier cdma2000 WaveformFigure 8-8Activating a Custom Multicarrier cdma2000 SetupUsing the

Chapter 8 223CDMA Digital ModulationCreating a Custom Multicarrier cdma2000 WaveformAfter waveform generation, the new multicarrier cdma2000 waveform

8 Chapter 1Signal Generator OverviewFront Panel Overview4. Amplitude KeyPressing this hardkey activates the amplitude function. You can change the RF

224 Chapter 8CDMA Digital Modulationcdma2000 Forward Link Modulation for Receiver Testcdma2000 Forward Link Modulation for Receiver TestThis section t

Chapter 8 225CDMA Digital Modulationcdma2000 Forward Link Modulation for Receiver Testchannels.1. Press Mode Setup to return to the top-level real-tim

226 Chapter 8CDMA Digital Modulationcdma2000 Forward Link Modulation for Receiver TestFigure 8-10 Forward Fundamental Channel (F-FCH) SetupNote that t

Chapter 8 227CDMA Digital Modulationcdma2000 Forward Link Modulation for Receiver TestThe power level displayed for each channel is now changed to sho

228 Chapter 8CDMA Digital Modulationcdma2000 Forward Link Modulation for Receiver Testforward link cdma2000 setup and to set the EbNo value for indivi

Chapter 8 229CDMA Digital Modulationcdma2000 Forward Link Modulation for Receiver TestConfiguring the RF OutputThe steps in this procedure build upon

230 Chapter 8CDMA Digital Modulationcdma2000 Reverse Link Modulation for Receiver Testcdma2000 Reverse Link Modulation for Receiver TestThis section t

Chapter 8 231CDMA Digital Modulationcdma2000 Reverse Link Modulation for Receiver TestNotice that the display shows a single reverse access channel. T

232 Chapter 8CDMA Digital Modulationcdma2000 Reverse Link Modulation for Receiver Test10.Press 12 > dB > Return.You have now modified the revers

Chapter 8 233CDMA Digital Modulationcdma2000 Reverse Link Modulation for Receiver Testremain unchanged so the user can complete the relative power adj

Chapter 1 9Signal Generator OverviewFront Panel OverviewThis connector can also serve as burst envelope input providing linear control as follows:0 V

234 Chapter 8CDMA Digital Modulationcdma2000 Reverse Link Modulation for Receiver TestFigure 8-15Managing NoiseThe tasks in this procedure build upon

Chapter 8 235CDMA Digital Modulationcdma2000 Reverse Link Modulation for Receiver TestGenerating the Baseband SignalThis procedure builds upon the pre

236 Chapter 8CDMA Digital ModulationApplying a User-Defined FIR Filter to a cdma2000 WaveformApplying a User-Defined FIR Filter to a cdma2000 Waveform

Chapter 8 237CDMA Digital ModulationApplying a User-Defined FIR Filter to a cdma2000 WaveformFigure 8-17The filter you selected is NEWFIR2. You can se

238 Chapter 8CDMA Digital ModulationIS-95A ModulationIS-95A ModulationThis section teaches you how to build dual arbitrary waveform generated IS-95A C

Chapter 8 239CDMA Digital ModulationIS-95A ModulationCreating a User-Defined CDMA StateIn this procedure, you learn how to customize a predefined CDMA

240 Chapter 8CDMA Digital ModulationIS-95A ModulationModifying the Code Domain PowerPress Adjust Code Domain Power > IS-97 Levels.You now have a cu

Chapter 8 241CDMA Digital ModulationIS-95A ModulationThe custom CDMA signal is now available at the RF OUTPUT connector.Applying Changes to an Active

242 Chapter 8CDMA Digital ModulationIS-95A ModulationAdding a Carrier1. Highlight the 9 channel forward carrier in table row 2.2. Press Insert Row >

Chapter 8 243CDMA Digital ModulationIS-95A ModulationDuring waveform generation, the CDMA and I/Q annunciators appear and the user-defined multicarrie

10 Chapter 1Signal Generator OverviewFront Panel Overview13. LF OUTPUT This BNC connector is the output for modulation signals generated by the low fr

244 Chapter 8CDMA Digital ModulationIS-95A Modulation

2459 Custom Digital Modulation

246 Chapter 9Custom Digital ModulationUsing the Arbitrary Waveform GeneratorUsing the Arbitrary Waveform GeneratorThis section teaches you how to buil

Chapter 9 247Custom Digital ModulationUsing the Arbitrary Waveform GeneratorCreating a Custom TDMA Digital Modulation StateIn this procedure, you lear

248 Chapter 9Custom Digital ModulationUsing the Arbitrary Waveform GeneratorConfiguring the RF Output1. Set the RF output frequency to 835 MHz. 2. Set

Chapter 9 249Custom Digital ModulationUsing the Arbitrary Waveform Generator1. Press Mode > Custom > ARB Waveform Generator.2. Press Setup Selec

250 Chapter 9Custom Digital ModulationUsing the Arbitrary Waveform GeneratorModifying Carrier Power1. Highlight the Power value (0.00 dB) for the carr

Chapter 9 251Custom Digital ModulationUsing the Arbitrary Waveform GeneratorStoring a Custom Multicarrier TDMA Digital Modulation StateUsing this proc

252 Chapter 9Custom Digital ModulationUsing the Real Time I/Q Baseband GeneratorUsing the Real Time I/Q Baseband GeneratorThe custom format enables yo

Chapter 9 253Custom Digital ModulationUsing the Real Time I/Q Baseband GeneratorCreating User-Defined Custom ModulationThis section teaches you how to

Chapter 1 11Signal Generator OverviewFront Panel Overview18. Incr Set KeyThis hardkey enables you to set the increment value of the current active fun

254 Chapter 9Custom Digital ModulationUsing the Real Time I/Q Baseband GeneratorConfiguring the Burst Rise and Fall Parameters1. Press Burst Shape >

25510 GPS Modulation

256 Chapter 10GPS ModulationOption OverviewOption OverviewThis real-time personality simulates GPS satellite transmissions for single channel receiver

Chapter 10 257GPS ModulationGPS ConceptsGPS ConceptsSignal Generation Block DiagramFigure 10-1 shows how the GPS signal is generated within the ESG. N

258 Chapter 10GPS ModulationGPS ConceptsData Modes and Subframe StructuresThe GPS personality lets you transmit data three different ways using the C/

Chapter 10 259GPS ModulationGPS ConceptsThe TLM word, which is 30-bits long, is structured using the preamble for the first 8-bits, 16 reserve bits (9

260 Chapter 10GPS ModulationGPS ConceptsRear Panel Signal SynchronizationFigure 5-1 illustrates the timing relationships for the GPS signals available

Chapter 10 261GPS ModulationGPS ConceptsUser FilesLike the other data types, user files require a selection for the data mode (see “Data Modes and Sub

262 Chapter 10GPS ModulationGPS OperationGPS OperationThis section guides you through the basic operation for using the real-time GPS option. Setting

Chapter 10 263GPS ModulationGPS Operationthe C/A chip rate is 1.023 Mcps with a clock reference of 10.23 Mcps. A 2.5 kHz doppler shift was added to si

12 Chapter 1Signal Generator OverviewFront Panel Overview25. Preset KeyThis hardkey is used to set the signal generator to a known state (factory or u

264 Chapter 10GPS ModulationGPS OperationNOTE The chip rate of the external source must match the chip rate value set using the GPS Ref (f0) softkey.F

Chapter 10 265GPS ModulationTesting Receiver SensitivityTesting Receiver SensitivityRefer to Figure 10-6. 1. Connect the cables between the receiver a

266 Chapter 10GPS ModulationSetting Up a GPS Bit Error Rate TestSetting Up a GPS Bit Error Rate Test This section shows how to make GPS BER measuremen

Chapter 10 267GPS ModulationSetting Up a GPS Bit Error Rate TestConnecting the Test EquipmentRefer to Figure 10-7. 1. Connect the cables between your

268 Chapter 10GPS ModulationSetting Up a GPS Bit Error Rate TestSelecting the Data Format1. Press Mode > More (1 or 2) > Real Time GPS. 2. Ensur

Chapter 10 269GPS ModulationSetting Up a GPS Bit Error Rate TestStarting BERT measurementsPress the front panel Trigger hardkey to start the BER measu

270 Chapter 10GPS ModulationSetting Up a GPS Bit Error Rate Test

27111 Multitone Waveform Generator

272 Chapter 11Multitone Waveform GeneratorCreating a Custom Multitone WaveformCreating a Custom Multitone WaveformUsing the Multitone Setup table edit

Chapter 11 273Multitone Waveform GeneratorCreating a Custom Multitone WaveformRemoving a Tone1. Highlight the value (On) in the State column for the t

Chapter 1 13Signal Generator OverviewFront Panel Overviewused to clock the DATA and SYMBOL SYNC signals. The maximum clock rate is 50 MHz. The damage

274 Chapter 11Multitone Waveform GeneratorApplying Changes to an Active Multitone SignalApplying Changes to an Active Multitone SignalIf the multitone

Chapter 11 275Multitone Waveform GeneratorApplying Changes to an Active Multitone Signal1. Press Mode > Multitone.2. Press More (1 of 2) > Load/

276 Chapter 11Multitone Waveform GeneratorApplying Changes to an Active Multitone Signal

27712 Real Time TDMA Formats

278 Chapter 12Real Time TDMA FormatsEDGE Framed ModulationEDGE Framed ModulationThis example teaches you how to build framed real-time I/Q baseband ge

Chapter 12 279Real Time TDMA FormatsEDGE Framed ModulationConfiguring the RF Output1. Press Frequency > 891 > MHz.2. Press Amplitude > −5 >

280 Chapter 12Real Time TDMA FormatsGSM Framed ModulationGSM Framed ModulationThis example teaches you how to build framed real-time I/Q baseband gene

Chapter 12 281Real Time TDMA FormatsGSM Framed ModulationConfiguring the RF Output1. Set the RF output frequency to 891 MHz. 2. Set the output amplitu

282 Chapter 12Real Time TDMA FormatsDECT Framed ModulationDECT Framed ModulationThis example teaches you how to build framed real-time I/Q baseband ge

Chapter 12 283Real Time TDMA FormatsDECT Framed Modulation2. Set the output amplitude to −10 dBm. 3. Press RF On/Off to On.The user-defined DECT signa

Contentsiii1. Signal Generator Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Signal Generator Features

14 Chapter 1Signal Generator OverviewFront Panel DisplayFront Panel DisplayFigure 1-2 shows the front panel display. The LCD screen will display data

284 Chapter 12Real Time TDMA FormatsPHS Framed ModulationPHS Framed ModulationThis example teaches you how to build framed real-time I/Q baseband gene

Chapter 12 285Real Time TDMA FormatsPHS Framed ModulationConfiguring the RF Output1. Set the RF output frequency to 1.89515 GHz. 2. Set the output amp

286 Chapter 12Real Time TDMA FormatsPDC Framed ModulationPDC Framed ModulationThis example teaches you how to build framed real-time I/Q baseband gene

Chapter 12 287Real Time TDMA FormatsPDC Framed Modulationinstrument preset, power cycle, or reconfigured signal generation.Configuring the RF Output1.

288 Chapter 12Real Time TDMA FormatsNADC Framed ModulationNADC Framed ModulationThis example teaches you how to build framed real-time I/Q baseband ge

Chapter 12 289Real Time TDMA FormatsNADC Framed Modulationinstrument preset, power cycle, or reconfigured signal generation.Configuring the RF Output1

290 Chapter 12Real Time TDMA FormatsTETRA Framed ModulationTETRA Framed ModulationThis example teaches you how to build framed real-time I/Q baseband

Chapter 12 291Real Time TDMA FormatsTETRA Framed ModulationConfiguring the RF Output1. Set the RF output frequency to 1.894880 MHz. 2. Set the output

292 Chapter 12Real Time TDMA FormatsTETRA Framed Modulation

29313 W-CDMA Digital Modulation for Component Test

Chapter 1 15Signal Generator OverviewFront Panel Display2. AnnunciatorsThe display annunciators show the status of some of the signal generator functi

294 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationW-C DM A Downl ink Modul ationThis section teaches you how to buil

Chapter 13 295W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationCreating a User-Defined W-CDMA Downlink StateThis procedure teache

296 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationEditing Downlink Channel Parameters1. Use the front panel knob or

Chapter 13 297W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationNOTE For additional information on TFCI, TPC, and pilot power offs

298 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationInserting Additional ChannelsPress Insert Row > More (1 of 2) &

Chapter 13 299W-CDMA Digital Modulation for Component TestW-CDMA Downlink Modulationrefers to the predefined configuration, not the number of channels

300 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Downlink Modulation2. Press W-CDMA Define > Store Custom W-CDMA State > Store T

Chapter 13 301W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationCreating a User-Defined Multicarrier W-CDMA StateThis procedure te

302 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationEdit Item > 3 > Enter. Refer to, “Multicarrier Setup Page 2”

Chapter 13 303W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationFigure 13-2 Multicarrier Setup Page 2You now have a user-defined 3

16 Chapter 1Signal Generator OverviewFront Panel DisplayL This annunciator appears when the signal generator is in listener mode and is receiving in

304 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Downlink Modulationstored in volatile ARB memory. The waveform is now modulating the

Chapter 13 305W-CDMA Digital Modulation for Component TestW-CDMA Downlink ModulationThe user-defined multicarrier W-CDMA state is now stored in non-vo

306 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Uplink ModulationW-CDMA Uplink ModulationThis section teaches you how to build uplink

Chapter 13 307W-CDMA Digital Modulation for Component TestW-CDMA Uplink ModulationCreating a User-Defined W-CDMA Uplink StateThis procedure teaches yo

308 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Uplink ModulationEditing Uplink Channel Parameters1. Use the front panel knob or arro

Chapter 13 309W-CDMA Digital Modulation for Component TestW-CDMA Uplink ModulationClipping the Waveform1. Press Mode Setup > More (1 of 2) > ARB

310 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Uplink ModulationApplying Channel Modifications to an Active WaveformTo apply channel

Chapter 13 311W-CDMA Digital Modulation for Component TestW-CDMA ConceptsW-CDMA ConceptsFigure 13-3 Downlink Channel Structure

312 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA ConceptsFigure 13-4 Uplink Channel Structure

Chapter 13 313W-CDMA Digital Modulation for Component TestW-CDMA ConceptsUnderstanding TPC ValuesTPC values determine how the transmit power of the re

Chapter 1 17Signal Generator OverviewFront Panel Display3. Digital Modulation AnnunciatorsAll digital modulation annunciators appear in this location.

314 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA ConceptsFigure 13-6 TPC Bits per TimeslotUnderstanding TFCI, TPC, and Pilot Power Off

Chapter 13 315W-CDMA Digital Modulation for Component TestW-CDMA ConceptsFigure 13-7 TFCI, TPC, and Pilot PowerThe display in Figure 13-8 shows that t

316 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA ConceptsCalculating Downlink Scramble CodesThe Option 400 signal generator implements

Chapter 13 317W-CDMA Digital Modulation for Component TestW-CDMA ConceptsIf the Scramble Offset field is zero, then the scramble code is in the primar

318 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA ConceptsScramble Codes with Right and Left Alternate Scramble TypesRecalling that rig

Chapter 13 319W-CDMA Digital Modulation for Component TestW-CDMA ConceptsA: Primary set + Left Alternate B: Secondary set + Right Alternatei = 6 i = 8

320 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Frame StructuresW-CDMA Frame StructuresThis section contains graphical representation

Chapter 13 321W-CDMA Digital Modulation for Component TestW-CDMA Frame StructuresDownlink PCCPCH + SCH Frame StructureFigure 13-10 PCCPCH + SCH Frame

322 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Frame StructuresDownlink DPCCH/DPDCH Frame StructureFigure 13-11 DPCCH/DPDCH Frame St

Chapter 13 323W-CDMA Digital Modulation for Component TestW-CDMA Frame Structures60 30 128 510 90 600 40 6 28 0 24a60 30 128 480 120 600 40 6 26 2 24a

18 Chapter 1Signal Generator OverviewRear Panel OverviewRear Panel OverviewFigure 1-3 shows the signal generator rear panel. The signal generator rear

324 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Frame StructuresUplink DPCCH/DPDCH Frame StructureFigure 13-12 DPCCH/DPDCH Frame Stru

Chapter 13 325W-CDMA Digital Modulation for Component TestW-CDMA Frame StructuresTable 13-4 DPCCH FieldsChannel Bit Rate (kbps)Channel Symbol Rate (ks

326 Chapter 13W-CDMA Digital Modulation for Component TestW-CDMA Frame Structures

32714 W-CDMA Downlink Digital Modulation for Receiver Test

328 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkUsing W-CDMA DownlinkThis section teaches you how to build real

Chapter 14 329W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkConfiguring the Physical LayerThe steps in this procedure build

330 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkFigure 14-2 Physical Layer Table EditorEach data channel can be

Chapter 14 331W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkFigure 14-3 Transport Layer Table EditorUse the arrow keys or t

332 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkAdjusting Code Domain PowerThe tasks in this procedure build up

Chapter 14 333W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkSetting Equal Channel PowersThis task teaches you how to set th

Chapter 1 19Signal Generator OverviewRear Panel OverviewFigure 1-41. 321.4 IN Connector (Option 300 only)Use this female SMB connector to input a down

334 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkYou have now set the overall carrier to noise ratio to 10 dB an

Chapter 14 335W-CDMA Downlink Digital Modulation for Receiver TestUsing W-CDMA DownlinkNotice that with the personality already turned on, as soon as

336 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Downlink ConceptsW-CDMA Downlink ConceptsDPCH Coding Block Diagram

Chapter 14 337W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Downlink ConceptsReference Measurement ChannelsReal-time I/Q baseband W-CDMA

338 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Downlink Conceptsa. ESG Channel # 1 default shown. Default channel code for C

Chapter 14 339W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Downlink ConceptsScramble CodesThe real-time I/Q baseband 3GPP W-CDMA persona

340 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Downlink ConceptsW-CDMA AWGN Measurements and BandwidthsThe AWGN (additive wh

Chapter 14 341W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Downlink ConceptsFigure 14-7 Noise Measurement BandwidthsAs shown in Figure 1

342 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Downlink ConceptsFigure 14-8 Ec/No Reference SelectionWhen Ec/No is 0.0 dB, C

Chapter 14 343W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Frame StructuresW-CDMA Frame StructuresThis section contains graphical repres

20 Chapter 1Signal Generator OverviewRear Panel Overview3. BER CLK IN Connector (Option UN7 only)Use this connector to input the clock signal for the

344 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Frame StructuresDownlink PCCPCH + SCH Frame StructureFigure 14-10 PCCPCH + SC

Chapter 14 345W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Frame StructuresDownlink DPCCH/DPDCH Frame StructureFigure 14-11 DPCCH/DPDCH

346 Chapter 14W-CDMA Downlink Digital Modulation for Receiver TestW-CDMA Frame Structures30 15 256 120 180 300 20 2 6 2 28a60 30 128 510 90 600 40 6 2

34715 W-CDMA Uplink Digital Modulation for Receiver TestThis chapter teaches you how to build fully coded W-CDMA uplink modulated signals for testing

348 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestEquipment SetupEquipment SetupThe following diagrams show the equipment setups that ar

Chapter 15 349W-CDMA Uplink Digital Modulation for Receiver TestEquipment SetupFigure 15-2 Base Transceiver Station Setup

350 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHUnderstanding the PRACHOverviewThe PRACH is used by the UE (use

Chapter 15 351W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHtransmission of access slots, thus creating an offset between t

352 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHPRACH transmission.SignaturesA signature is a series of 16 bits

Chapter 15 353W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHchannel) that consists of a control channel (DPCCH, dedicated p

Chapter 1 21Signal Generator OverviewRear Panel Overview• 0.5 Vpk, typical, corresponds to one unit length of the I/Q vector.•0.69 Vpk (2.84 dB), typi

354 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHvalues or select an appropriate data part slot format.The contr

Chapter 15 355W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHthe additional power required when more UEs (user equipment/mob

356 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHpart and the preamble powers (Pp-m = CntldBm − PredBm). (See Fi

Chapter 15 357W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHoff for that particular relative power. Table 15-1 shows the be

358 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHor data power will result in a ratio of one (0.00 dB). However

Chapter 15 359W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHFigure 15-9 Data Part Power Determining Message Part PowerThe m

360 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHIn this example the data part power will be 40 dB higher than t

Chapter 15 361W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHFigure 15-10 Pp-m ModeTotal Power ModeThe total mode lets you s

362 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestUnderstanding the PRACHFigure 15-11 Total Mode SelectionTotal Power Mode SelectedPp-m

Chapter 15 363W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalGenerating a Single PRACH SignalUsing the single PRACH

22 Chapter 1Signal Generator OverviewRear Panel Overview9. Q-bar OUT ConnectorQ-bar is used in conjunction with Q to provide a balanced baseband stimu

364 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalA default PRACH signal output has a single preamble an

Chapter 15 365W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalFigure 15-12 Displayed ESG SignalModifying the PRACH P

366 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalPRACH power.3. Set the power ramp for multiple preambl

Chapter 15 367W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH Signal5. Press Return > PRACH Timing Setup.6. Configure t

368 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH Signalslot format. The Puncture field currently displays a n

Chapter 15 369W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalViewing the Modified PRACH SignalThis section uses the

370 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH Signalto perform a power search. Refer to “Special Power Con

Chapter 15 371W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalFigure 15-17 AICH Connection DiagramConfiguring the PR

372 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH Signal2. Press LF Out Waveform > More (1 of 2) > Pulse

Chapter 15 373W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalFigure 15-18 Displayed ESG SignalUsing the AICH Featur

Chapter 1 23Signal Generator OverviewRear Panel Overview11. EVENT 2 ConnectorWith Option 001 or 002 installed, this connector outputs a data enable si

374 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestGenerating a Single PRACH SignalFigure 15-19 Base Transceiver Station AICH Connection

Chapter 15 375W-CDMA Uplink Digital Modulation for Receiver TestMultiple PRACH OverviewMultiple PRACH OverviewThe multiple PRACH feature of the ESG le

376 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestMultiple PRACH OverviewFigure 15-20 Timing Setup DisplayHowever a single UE retransmis

Chapter 15 377W-CDMA Uplink Digital Modulation for Receiver TestMultiple PRACH OverviewFigure 15-21 Transmitting PRACHsIf a third PRACH transmission w

378 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestMultiple PRACH OverviewPreamble pulse This indicates the beginning of the access slo

Chapter 15 379W-CDMA Uplink Digital Modulation for Receiver TestMultiple PRACH Overviewdecrease. This is demonstrated in Figure 15-23 where the AWGN f

380 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalSetting Up a Multiple PRACH SignalThe ESG automatica

Chapter 15 381W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signal4. Turn on the RF output.Selecting the PRACH and Mul

382 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signal2. Highlight the item under the Signal column that c

Chapter 15 383W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalFigure 15-26 PRACH Code Setup DisplayControlling the

ContentsivFront Panel Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 141. Frequenc

24 Chapter 1Signal Generator OverviewRear Panel Overview13. AUX I/O ConnectorThis connector enables you to access the inputs and outputs of the baseba

384 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signalonce a trigger is received until it is terminated by

Chapter 15 385W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signaldifferent trigger choice without having to return to

386 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalFigure 15-28 Tp-m Settinga. Highlight the Tp-m (time

Chapter 15 387W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signalincluding the ability to create your own pattern (Us

388 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalWhen the Apply Needed annunciator appears, press the

Chapter 15 389W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalFigure 15-30 PRACH Power Setup DisplaySetting the Pr

390 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signala. Highlight the Ctrl Beta field.b. Press 15 > En

Chapter 15 391W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalConfiguring the PRACH Timing SetupIn this procedure

392 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signala. Highlight Off for UE2 in the On/Off column.b. Pre

Chapter 15 393W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalYou will see a dash inserted in place of the access

Chapter 1 25Signal Generator OverviewRear Panel Overview14. DIG I/Q I/O ConnectorFigure 1-6 shows the DIG I/Q I/O pin connector configuration. This co

394 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signalaccess slot.In order to clearly show the second UE1

Chapter 15 395W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalFigure 15-32 Multiple PRACH Timing SetupViewing a Mu

396 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH Signalsignal output may show different characteristics.1.

Chapter 15 397W-CDMA Uplink Digital Modulation for Receiver TestSetting Up a Multiple PRACH SignalFigure 15-33 Transmitted Multiple PRACH SignalConnec

398 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestOverload Testing with Multiple PRACHs—Multiple ESGsOverload Testing with Multiple PRAC

Chapter 15 399W-CDMA Uplink Digital Modulation for Receiver TestOverload Testing with Multiple PRACHs—Multiple ESGsTable 15-2 Multiple ESG I/O Signals

400 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestOverload Testing with Multiple PRACHs—Multiple ESGsAll of the I/O signal connectors ca

Chapter 15 401W-CDMA Uplink Digital Modulation for Receiver TestOverload Testing with Multiple PRACHs—Multiple ESGspage 399.Configuring the ESGs1. Set

402 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestOverload Testing with Multiple PRACHs—Multiple ESGsand the ESG selection was 40 msec,

Chapter 15 403W-CDMA Uplink Digital Modulation for Receiver TestOverload Testing with Multiple PRACHs—Multiple ESGsFigure 15-36 ESG 1 and ESG 2 Frame

26 Chapter 1Signal Generator OverviewRear Panel Overview15. AC Power ReceptacleThe power cord receptacle accepts a three-pronged cable that is shipped

404 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestOverload Testing with Multiple PRACHs—Multiple ESGs2. Press LF Out Waveform > More

Chapter 15 405W-CDMA Uplink Digital Modulation for Receiver TestDPCHDPCHGenerating a DPCCH/DPDCH with a Reference Measurement ChannelThe tasks in this

406 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCHConfiguring the E4440A for Viewing the DPCCH/DPDCH OutputThis procedure demonstrat

Chapter 15 407W-CDMA Uplink Digital Modulation for Receiver TestDPCHModifying the DPCCH/DPDCH Physical and Transport LayersModifying the Physical Laye

408 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCHtoo high for the current slot format, this could cause over puncturing of the tran

Chapter 15 409W-CDMA Uplink Digital Modulation for Receiver TestDPCHFigure 15-40 DPCH Code Setup DisplayModifying the Transport LayerUp to six transpo

410 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCHFigure 15-41 Excessive Puncturing5. Select the encoder type.a. Move the cursor to

Chapter 15 411W-CDMA Uplink Digital Modulation for Receiver TestDPCH9. Press Return.A third transport channel has been turned on and configured to use

412 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCHThis task teaches you how to set up a compressed frame.1. Press Mode Setup > Li

Chapter 15 413W-CDMA Uplink Digital Modulation for Receiver TestDPCHb. Press 14 > Enter.Out of the 15 slots per frame, the standard specifies that

Chapter 1 27Signal Generator OverviewRear Panel OverviewFigure 1-718. LAN ConnectorLAN based communication is supported by the signal generator via th

414 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCH11.Press Apply Channel Setup.When the Apply Needed annunciator appears, press the

Chapter 15 415W-CDMA Uplink Digital Modulation for Receiver TestDPCHConfiguring the E4440AThis task builds upon “Configuring the E4440A for Viewing th

416 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCHFigure 15-43 Displayed Compressed Signal and Signal ParametersConfiguring the E444

Chapter 15 417W-CDMA Uplink Digital Modulation for Receiver TestDPCHAdjusting the Compressed Mode Signal” on page 414.1. Select the spectrum analysis

418 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCHNOTE C/N values less than 10 dB may not be visible on a spectrum analyzer.You have

Chapter 15 419W-CDMA Uplink Digital Modulation for Receiver TestDPCHNOTE C/N values less than 10 dB may not be visible on a spectrum analyzer.You have

420 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCHConnecting the ESG to a Base Transceiver Station1. Connect the ESG to the base sta

Chapter 15 421W-CDMA Uplink Digital Modulation for Receiver TestDPCHGenerating the Baseband SignalPress W-CDMA Off On to On.Configuring an External Si

422 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCH6. Press Apply Channel Setup.When the Apply Needed annunciator appears, press the

Chapter 15 423W-CDMA Uplink Digital Modulation for Receiver TestConfiguring the UE SetupConfiguring the UE Setup1. Press Mode > W-CDMA > Real Ti

28 Chapter 1Signal Generator OverviewRear Panel Overview21. TRIG IN ConnectorThis female BNC connector accepts a TTL or CMOS signal for triggering ope

424 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestLocating Rear Panel Input Signal ConnectorsLocating Rear Panel Input Signal Connectors

Chapter 15 425W-CDMA Uplink Digital Modulation for Receiver TestLocating Rear Panel Input Signal Connectors6. To exit this display, press either Mode

426 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestConfiguring Rear Panel Output SignalsConfiguring Rear Panel Output SignalsThe W-CDMA u

Chapter 15 427W-CDMA Uplink Digital Modulation for Receiver TestConfiguring Rear Panel Output SignalsFigure 15-51 Output Connector Selection2. Press M

428 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestConfiguring Rear Panel Output SignalsThis returns you to the top-level output signal s

Chapter 15 429W-CDMA Uplink Digital Modulation for Receiver TestAdjusting Code Domain PowerAdjusting Code Domain PowerThis procedure teaches you about

430 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestAdjusting Code Domain PowerSetting Equal Channel PowersThis task teaches you how to se

Chapter 15 431W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsW-CDMA Uplink ConceptsData Channel Air Interface Block Diagram

432 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsReference Measurement Channels (RMC)3GPP W-CDMA real-time signal

Chapter 15 433W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsTransition between Normal Frame and Compressed FrameIn a dedicat

Chapter 1 29Signal Generator OverviewRear Panel Overviewconnector.When using the real-time W-CDMA uplink personality, this connector is used to connec

434 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsConnecting the ESG to a W-CDMA Base StationFigure 15-58 shows th

Chapter 15 435W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsConnector Assignments for W-CDMA UplinkThis section describes co

436 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsDPCH mode. For PRACH mode, refer to Table 15-6 on page 437.Table

Chapter 15 437W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink Concepts10 MHz OUT BNC Output 10 MHz reference out.EVENT 1 BNC Output Si

438 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsBURST GATE INBNC Input PRACH start trigger. The connector is use

Chapter 15 439W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsSignal Descriptions for W-CDMA UplinkFigure 15-60 shows how W-CD

440 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsCompressed Mode Start TriggerInput Trigger to start compressed m

Chapter 15 441W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-61 DPCH Signal AlignmentPRACH ModeTable 15-8 provides

442 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsMessage Data Raw DataOutput The data for the message data part a

Chapter 15 443W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-62 PRACH Signal AlignmentPRACH Pulse Output Indicates

30 Chapter 1Signal Generator OverviewDigital Personality Revisions for ESG ModelsDigital Personality Revisions for ESG ModelsTable 1-9Format E443xB In

444 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsSynchronization DiagramsSignal Alignment for Default DPCH ModeFi

Chapter 15 445W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsDPCH SynchronizationFigure 15-64 illustrates the timing alignmen

446 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-65 illustrates the frame number alignment for the DPCH

Chapter 15 447W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-66 illustrates the frame number alignment for compress

448 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-67 illustrates the frame number alignment for compress

Chapter 15 449W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsPRACH SynchronizationFigure 15-68 illustrates the frame timing a

450 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-69 illustrates the frame number alignment for the PRAC

Chapter 15 451W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFrame Sync Trigger Status IndicatorThe signal generator uses a s

452 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsOut Sync AnnunciatorWhen the timing of the external frame synchr

Chapter 15 453W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsThe signal generator checks the timing difference between the ex

Chapter 1 31Signal Generator OverviewDigital Personality Revisions for ESG ModelsTD-SCDMA (TSM)Not offered Not offered Not offered V.3.0.0 Aug-02 Requ

454 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsPRACH that will turn the ALC off. Notice that the settings may d

Chapter 15 455W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-72 Noise Measurement BandwidthsAs shown in Figure 15-7

456 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-73 PRACH Eb/No Reference SelectionYou can calculate th

Chapter 15 457W-CDMA Uplink Digital Modulation for Receiver TestW-CDMA Uplink ConceptsFigure 15-74 DPCH External Power Control

458 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCCH/DPDCH Frame StructureDPCCH/DPDCH Frame StructureThis section contains graphical

Chapter 15 459W-CDMA Uplink Digital Modulation for Receiver TestDPCCH/DPDCH Frame Structure480 480 8 4800 320 320960 960 4 9600 640 640Table 15-12 DPC

460 Chapter 15W-CDMA Uplink Digital Modulation for Receiver TestDPCCH/DPDCH Frame Structure

46116 Troubleshooting

462 Chapter 16TroubleshootingIf You Encounter a ProblemIf You Encounter a ProblemIf the signal generator is not operating properly, refer to the prope

Chapter 16 463TroubleshootingBasic Signal Generator OperationsBasic Signal Generator OperationsCannot Turn Off Help Mode1. Press Utility > Instrume

32 Chapter 1Signal Generator OverviewDigital Personality Revisions for ESG Models

464 Chapter 16TroubleshootingBasic Signal Generator OperationsFigure 16-1 Effects of Reverse Power on ALCThe internally leveled signal generator RF ou

Chapter 16 465TroubleshootingBasic Signal Generator OperationsFigure 16-2 Reverse Power SolutionCompared to the original configuration, the ALC level

466 Chapter 16TroubleshootingBasic Signal Generator Operationsoutput. In this mode, a power meter is required to measure the output of the signal gene

Chapter 16 467TroubleshootingBasic Signal Generator Operationssearch calibration routine for the current RF frequency and amplitude. In this mode, if

468 Chapter 16TroubleshootingBasic Signal Generator OperationsSweep Appears to be StalledThe current status of the sweep is indicated as a shaded rect

Chapter 16 469TroubleshootingBasic Signal Generator Operations3. Edit the dwell values if they are incorrect.NOTE The effective dwell time at the RF O

470 Chapter 16TroubleshootingBasic Signal Generator OperationsIf either error message −311 or −700 is stored in the error message queue, the signal ge

Chapter 16 471TroubleshootingSignal Generator Lock-UpSignal Generator Lock-UpIf the signal generator is locked up, check the following:• Make sure tha

472 Chapter 16TroubleshootingSignal Generator Lock-Up2. Continue to hold down the Preset key until the following message is displayed:WARNING You are

Chapter 16 473TroubleshootingUpgrading FirmwareUpgrading FirmwareThe firmware in your signal generator may be upgraded when new firmware is released.

332 Basic Operation

474 Chapter 16TroubleshootingReturning a Signal Generator to Agilent TechnologiesReturning a Signal Generator to Agilent TechnologiesTo return your si

Chapter 16 475TroubleshootingReturning a Signal Generator to Agilent TechnologiesIndia 1-600-11-2929 000-800-650-1101Asia Call Center NumbersCountry P

476 Chapter 16TroubleshootingReturning a Signal Generator to Agilent Technologies

Index 477IndexSymbolsΦMannunciator, 15configuring, 153deviation, 153rate, 153Numerics10 MHz IN connector, 2810 MHz OUT connector, 28321.4 IN connector

Index478Indexcdma2000, receiver test (continued)reverse linkchanging the operating mode, 230configuring the RF output, 235editing channel setups, 230g

Index 479IndexDATA connector, 13data fieldsediting, 35data filescreating, 143modifying, 146storing, 145data part power, message part, 356data processi

Index480Indexexamples (continued)registers, deleting, 57RF output, configuring, 36–43sequences, deleting, 57swept output, 39table editor, list mode va

Index 481IndexGoto Row softkey, 35GPIBconnector, 26listener mode, 52GPSbasic operation, 262BER testing, 261, 266chip clock reference, 259configuring e

Index482Indexinstrument state register (continued)troubleshooting, 469using, 55See also memory cataloginstrument statesrecalling, 56saving, 55interfac

Index 483Indexmulticarrier TDMA waveformscreating, 249multitone waveform, setup, 272NNADC framed modulation, 288numeric keypad, 10nyquist filter, sele

ContentsvUsing Table Editors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34Table Editor

34 Chapter 2Basic OperationUsing Table EditorsUsing Table EditorsThe signal generator table editors enable you to simplify configuration tasks, such a

Index484IndexQQ connector, 13Q OUT connector, 21QAM modulation IQ map, 129Q-bar OUT connector, 22RR (remote) annunciator, 16Recall hardkey, 8receiver

Index 485IndexSYMBOL SYNC connector, 12synchronization, 192, 195synchronizingBCH, 171TCH, 173system accessories, 5TT (talker mode) annunciator, 16tabl

Index486IndexW-CDMA, receiver test (continued)uplinksetting equal channel powers, 430setting noise parameters, 417setting the carrier to noise ratio,

Chapter 2 35Basic OperationUsing Table EditorsTable Editor SoftkeysThe following table editor softkeys are used to load, navigate, modify, and store t

36 Chapter 2Basic OperationConfiguring the RF OutputConfiguring the RF OutputThis section will show you how to create continuous wave and swept RF out

Chapter 2 37Basic OperationConfiguring the RF Output6. Press the up arrow key.Each press of the up arrow key increases the frequency by the increment

38 Chapter 2Basic OperationConfiguring the RF Output7. Press Freq Offset > 1 > MHz.This enters a 1 MHz offset. The FREQUENCY area displays 2.000

Chapter 2 39Basic OperationConfiguring the RF Output4. Press RF On/Off.The display annunciator has changed from RF OFF to RF ON. The power at the RF O

40 Chapter 2Basic OperationConfiguring the RF OutputStep sweep provides a linear progression through the start-to-stop frequency and/or amplitude valu

Chapter 2 41Basic OperationConfiguring the RF Output11.Press Return > Sweep > Freq & Ampl.This sets the step sweep to sweep both frequency a

42 Chapter 2Basic OperationConfiguring the RF Output2. Press Sweep Type List Step.This toggles the sweep type from step to list.3. Press Configure Lis

Chapter 2 43Basic OperationConfiguring the RF Output9. Highlight the frequency item for point 8, then press Insert Item.Pressing Insert Item shifts fr

ContentsviUsing Waveform Markers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90Accessing the Mar

44 Chapter 2Basic OperationGenerating the Modulation FormatGenerating the Modulation FormatThe modulation format can be turned on prior to or after se

Chapter 2 45Basic OperationGenerating the Modulation FormatFigure 2-3 Modulation Format OnFirst AM MenuModulation format is OnActive Modulation Format

46 Chapter 2Basic OperationModulating the Carrier SignalModulating the Carrier SignalThe carrier signal is modulated when the Mod On/Off key is set to

Chapter 2 47Basic OperationCreating and Applying User Flatness CorrectionCreating and Applying User Flatness CorrectionUser flatness correction allows

48 Chapter 2Basic OperationCreating and Applying User Flatness Correction• GPIB interface cable• adapters and cables, as requiredConfigure the Power M

Chapter 2 49Basic OperationCreating and Applying User Flatness CorrectionFigure 2-5 User Flatness Correction Equipment SetupConfigure the Signal Gener

50 Chapter 2Basic OperationCreating and Applying User Flatness Correction4. Press Configure Step Array.This opens a menu for entering the user flatnes

Chapter 2 51Basic OperationCreating and Applying User Flatness CorrectionPerforming the User Flatness Correction ManuallyIf you are not using an Agile

52 Chapter 2Basic OperationCreating and Applying User Flatness CorrectionApplying a User Flatness Correction ArrayPress Return > Return > Flatne

Chapter 2 53Basic OperationCreating and Applying User Flatness Correction2. Press GPIB Listener Mode.This presets the signal generator and returns it

ContentsviiCreating a User-Defined FIR Filter Using the FIR Table Editor . . . . . . . . . . . . . . .120Modifying a FIR Filter Using the FIR Table E

54 Chapter 2Basic OperationUsing Data Storage FunctionsUsing Data Storage FunctionsThis section explains how to use the two forms of signal generator

Chapter 2 55Basic OperationUsing Data Storage Functions4. Press Catalog Type > User Flatness.The Catalog of USERFLAT Files is displayed.Storing Fil

56 Chapter 2Basic OperationUsing Data Storage Functions2. Configure the signal generator with the following settings:a. Press Frequency > 800 >

Chapter 2 57Basic OperationUsing Data Storage Functionsused.)3. Press RECALL Reg.The register to be recalled in sequence 1 becomes the active function

58 Chapter 2Basic OperationUsing Data Storage FunctionsTo Delete All Sequences CAUTION This will delete the contents of all registers and all sequenc

Chapter 2 59Basic OperationEnabling OptionsEnabling OptionsYou can retrofit your signal generator after purchase to add new capabilities. Some new opt

60 Chapter 2Basic OperationEnabling Optionscolumn of the appropriate hardware option in the Hardware Options menu.)3. To enable the software option, h

613 Basic Digital OperationThe following list shows the topics covered in this chapter:• “Arbitrary (ARB) Waveform Header Files” on page 62• “Using t

62 Chapter 3Basic Digital OperationArbitrary (ARB) Waveform Header FilesArbitrary (ARB) Waveform Header FilesHeaders are files that contain ARB wavefo

Chapter 3 63Basic Digital OperationArbitrary (ARB) Waveform Header Files2. Press Mode > CDMA > ARB CDMA2000 > CDMA2000 Off On to On.A default

ContentsviiiSetting the RF Output Amplitude . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153Setting the FM Deviation

64 Chapter 3Basic Digital OperationArbitrary (ARB) Waveform Header FilesThe default header for the cdma2000 waveform is now displayed. The default hea

Chapter 3 65Basic Digital OperationArbitrary (ARB) Waveform Header Filesdisplayed alpha/symbol softkeys and the numeric keypad to enter information su

66 Chapter 3Basic Digital OperationArbitrary (ARB) Waveform Header FilesI/Q Mod Filter This displays the I/Q modulator filter setting saved to the h

Chapter 3 67Basic Digital OperationArbitrary (ARB) Waveform Header FilesFigure 3-3 ARB Setup Softkey Menu and Marker Utilities4. Press ARB Sample Cloc

68 Chapter 3Basic Digital OperationArbitrary (ARB) Waveform Header FilesSettings column for the parameters changed in the previous steps. Remember it

Chapter 3 69Basic Digital OperationArbitrary (ARB) Waveform Header FilesFigure 3-5 Saved Header File ChangesWhile a modulation format is active, the w

70 Chapter 3Basic Digital OperationArbitrary (ARB) Waveform Header Filescannot edit the AUTOGEN_WAVEFORM header file from the dual ARB player if the w

Chapter 3 71Basic Digital OperationArbitrary (ARB) Waveform Header FilesViewing the Header File with the Dual ARB Player OffOne of the differences in

72 Chapter 3Basic Digital OperationArbitrary (ARB) Waveform Header Filesfor the waveform that is currently playing. When you select another header fil

Chapter 3 73Basic Digital OperationArbitrary (ARB) Waveform Header FilesFigure 3-8 Waveform File Type SelectionNVWFM This choice will display all of

ContentsixMeasuring the Initial Delay Value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .180Adjusting the Delay Value

74 Chapter 3Basic Digital OperationArbitrary (ARB) Waveform Header Files5. Press the View Header softkey.The header file for the selected waveform fil

Chapter 3 75Basic Digital OperationArbitrary (ARB) Waveform Header FilesFigure 3-10 Header File Settings AppliedFollow the procedure “Playing a Wavefo

76 Chapter 3Basic Digital OperationUsing the Dual ARB PlayerUsing the Dual ARB PlayerThe dual arbitrary (ARB) waveform player is used to play-back wav

Chapter 3 77Basic Digital OperationUsing the Dual ARB PlayerFigure 3-11 First-Level Dual ARB Player Softkey MenuCreating Waveform SegmentsThere are tw

78 Chapter 3Basic Digital OperationUsing the Dual ARB PlayerNOTE There can only be one AUTOGEN_WAVEFORM file in memory at any given time. Since all AR

Chapter 3 79Basic Digital OperationUsing the Dual ARB Player4. Highlight the AUTOGEN_WAVEFORM file.5. Press Rename Segment > Editing Keys > Clea

80 Chapter 3Basic Digital OperationUsing the Dual ARB PlayerPlaying a WaveformYou can play a waveform sequence or a waveform segment using this proced

Chapter 3 81Basic Digital OperationUsing the Dual ARB PlayerEditing Waveform SequencesThis procedure will teach you how to edit waveform segments with

82 Chapter 3Basic Digital OperationUsing the Dual ARB PlayerThe waveform sequence is now defined as 100 repetitions of the first waveform segment foll

Chapter 3 83Basic Digital OperationUsing the Dual ARB PlayerLoading Waveform Segments from Non-Volatile MemoryWaveform segments must be in volatile me