Agilent Technologies Option H48 Multiport Test Set Z5623A Dokumentacja Pobierz pdf (Strona 136)

Page 87

安捷倫科技高頻元件量測研討會

Feb.23, 2006

Digital Board Interconnect - off resonance

isolated trace

port 1

port 2

harmonic signal

0.4 GHz

output

S(1,1)

isolated trace

S(1,2)

isolated trace

Page 88

安捷倫科技高頻元件量測研討會

Feb.23, 2006

Digital Board Interconnect - on resonance

isolated trace

port 1

port 2

harmonic signal

2.33 GHz

resonance

blocks the signal

no output

S(1,1)

isolated trace

S(1,2)

isolated trace

1 2 ... 131 132 133 134 135 136 137 138 139 140 141 ... 190 191

安捷倫科技高頻元件量測研討會 1
Packaging Development 2
Trend of Integrated 2
Analysis 2
Interesting Semiconductor 3
Why SIP ? 4
Die Stacking Package Trend 4
PoP and PiP 5
Fine Pitch Wire Bonding 5
Analysis Case I : 7
Analysis Case II : 9
Analysis Case IV : 10
Analysis Case V : 11
Website: www.aseglobal.com 14
Thank You For Your Listening 15
PNA Based Solutions 16
• Saves battery power 18
Pulsed Antenna Test 19
Radar and Electronic-Warfare 20
VNA Pulsed-RF Measurements 21
VNA data display 22
Note: PNA controls timing 23
Using Wideband Detection 24
Time domain 25
Frequency domain 25
Typical Hardware Setup 26
(Narrowband) 26
COTS stand alone hardware 27
Comparing the 8510 and PNA 28
CTS-I Family 29
CTS-II Family 29
Z5623A Hxx RF Modulators 30
• Average pulse measurements 31
Advantage: pulsed bias to 34
10 MHz Ref 35
Resources 36
Target Applications 37
Diversity Rx 38
WLAN FEM（2.4G・５G dual band） 39
UMTS1900 40
(Available December 2005) 41
PNA/PNA-L Option 550 42
Variety Summary 42
Test Sets Overview 43
Platform 43
Description Benefits 43
Multiport Specials – Variety 44
•Extension Test Sets 44
• Hybrid Test Sets 45
• Switching Test Sets 45
Multiport Special 48
Multiport Qualification 49
Information Sources 50
Ming-Fan, Tsai 51
Overview 52
Interconnects 54
Legacy Backplane System 56
TDR and VNA Techniques 57
Microprobing on SMA Pads 58
Port 2Port 1Port 2Port 1 61
Conclusions 63
• length is different 66
TDR or VNA 68
FREE Agilent Email Updates 70
Z Impedance? 71
Short Termination 72
Open Termination 72
Perfect Termination 73
Impedance Mismatch Terms 73
Mismatch Exercise 74
T = transit time 75
Series R-C 77
Shunt R-C 77
Introducing 86100C option 202 79
- TDR S-Parameters capability 79
What is Normalization? 82
University (Bracewell 82
Transform) 82
Critical for Rambus! 82
Fixture DUT 83
Comparison of TDR and PNA 84
TDR vs VNA comparison 85
N1024A TDR Calibration Kit 86
Diff. TDR Probe 87
TDR Accessories 87
At 9 ps step speed, we see 5 90
Each event is easily seen 90
Optimizing 91
Configuring a system 91
•Extensive Calibration 92
•Eye diagram simulation 92
•N5320A-225 20G VNA 92
•N5320A-240 20G VNA 92
•54754Ax2 TDR base 92
Clock Frequency (MHz) 95
Simulation Leadership 97
From Touchstone to ADS 98
ADS for Signal Integrity 98
Typical SI Problem 100
Simulators 101
Measurements 101
Agilent Ptolemy 102
Link Level Simulation 103
Transmitter with Pre-Emphasis 104
Channel Model 104
Channel Subnetwork 105
Interconnect Models 106
EM Models - Momentum 106
Momentum RF 107
Quasi-Static Electromagnetics 107
Comparison of Models 107
 Pre-emphasis 108
 Encoding/Decoding 108
 Source descriptions 108
Integration of other Models 109
Measurement-based Models 110
Probing Solution + PLTS + ADS 110
Bringing it All Together 111
Signal Integrity Resources 111
–Length – 2 days – hands-on 113
Using ADS for Signal 114
Integrity Design 114
Wireline Applications 115
IBIS Library 117
Signal Integrity Applications 118
TDR Simulation Instrument 118
FrontPanels: Eye Diagram 121
Oscilloscope Mode 122
Eye/Mask Mode 123
Receiver 125
Example Test Board 126
Create Models from Data 127
DCA/BERT Measurement Setup 127
Simulation 128
DCA Measurement of BERT 129
Simulation with Measured Data 129
IBIS Model 130
Importing IBIS Component 132
Installation of design kit 133
IBIS design kit components 133
Pin Number 134
V_fixture 134
Momentum 135
Digital Board Interconnect 137
Advanced Calibration 139
Techniques and Fixturing 139
Issues for VNAs 139
Agilent Technologies Ltd 139
Course Goal 140
Objectives 140
“Hawaii” 140
What’s Totally New in 6.0… 141
What’s New in 6.0 From 5.0… 141
Old Calibration Paradigm 143
New Calibration Paradigm 144
Old Calset File Location 145
New Cal File Locations 145
Limited Instrument State 146
Extended Instrument State 146
Pointer to Calset 146
Error Terms 146
Receiver calibration 147
What is a “Delta Match” cal? 148
Test port 2 149
Test port 1 149
Delta Match Cal 151
When is Delta Match Used? 151
Global Delta Match 152
User Delta Match 152
Using 2-Port ECal Modules 153
Cascade’s WinCal 2006 157
Frequently Asked Questions 158
TRL Summary 158
• Auto port extensions 159
• Embedding/de-embedding 159
• Measuring fixtures/probes 159
Non-Insertable ECal Modules 160
Unknown Thru to the Rescue! 161
Unknown Thru Algorithm 161
1-port calibrations 162
Unknown thru 162
Cable Movement Error 163
(Usual Way) 164
(Unknown Thru) 165
CABLE MOVEMENT 166
Different connector 167
Finish multiport cal 167
1.85 f-f adapter comparison 168
3. Higher-order modes 169
Fixture And Probe Techniques 170
Probe Probe 171
Offset Load Definition 172
Offset Load Class Assignments 172
Thru Loss Definition 173
Error Correction Choices 174
Coaxial calibration 175
Measurement Results 176
Which Standards Should I Use? 178
Broadband APE Example 178
Narrowband APE Example 179
Adjusting for Mismatch 179
Active Span or Active Marker 180
Loss at DC 180
Fixturing for the Masses 182
Order of Fixturing Operations 182
Port Matching 183
Differential Port Matching 183
Port Z (Impedance) Conversion 184
2-Port De-Embedding 185
4-Port Embedding/De-Embedding 185
Answer: Crosstalk terms! 186
On-wafer SMC Measurements 187
Unknown thru and DUT 189
2-port calibration 190

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