Agilent Technologies E1356A Instrukcja Obsługi Strona 35

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LO to Chassis Leakage 1. Make Hardware Connections
Turn power supply and mainframe power OFF
Connect DMM, power supply, and resistor as shown in
Figure 2-10
Turn power supply and mainframe power ON
2. Check Direct Terminals Leakage Current
Send *RST to FET Multiplexer
Send TRIG SGL to DMM
Record the DMM reading in Table 2-1
Positive Polarity, LO to Chassis, Direct
The DMM measurement should be less than 0.010 Vdc.
A measurement out of this range indicates a failure of the
FET Multiplexer.
3. Check Channels Leakage
Send CLOS(@nn00) to the FET Multiplexer, where nn is the
card number (typically 01)
Send TRIG SGL to DMM
Agilent E1300B/E1301B
Figure 2-10. Positive LO to Chassis Leakage Connections
Verification Tests 2-17
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